The Global Goals
In 2015, UN member states agreed to 17 global to end poverty, protect the planet and ensure prosperity for all. Vasilios's work contributes towards the following SDG(s):
About Vasilios
I am a Lecturer (assistant professor) in Computer Science at the Âé¶¹´«Ã½Ó³». My research develops methods that make AI run faster and with lower energy and memory use across diverse platforms, from edge devices to supercomputers. I work on compiler and runtime optimisation for HPC and high-performance embedded systems (CPUs/GPUs/NPUs/FPGAs), efficient DNN inference (compression via low-rank factorisation and pruning, memory-aware execution, adaptive networks), and performance optimisation of tensor/matrix computations for HPC and edge AI.Â
I have published over 60 papers, including top-tier journal and conference publications. I have previously served as PI on two small research grants and have contributed to numerous European and international funded projects as a researcher and external collaborator.
I welcome PhD applicants and industry collaborations broadly in efficient AI and high-performance computing, including AI systems and compilers, performance and energy optimisation, model compression, heterogeneous and edge computing, and the optimisation of machine-learning and scientific workloads.
Research Interests:
- AI compilers & performance engineering - hardware-aware optimisation across CPUs, GPUs, NPUs and FPGAs
-
Efficient DNN inference (model compression; memory & energy optimisation)
-
Adaptive networks (dynamic/conditional computation; compute–accuracy trade-offs)
-
Tensor/matrix computation optimisation
-
Runtime/task scheduling and memory management for HPC/edge systems
Research Highlights:
- ACM TECS 2025: Optimising Tensor Train decomposition for DNNs on RISC-V using design-space exploration and compiler optimisations, targeting efficient edge deployment.
-
ACM TECS 2025: Register blocking via a source-to-source, analytical modelling methodology for affine loop kernels, enabling predictable performance/portable optimisation.
-
DATE 2024: A CNN compression methodology for layer-wise rank selection that explicitly accounts for inter-layer interactions, improving compression decisions beyond per-layer heuristics.
-
IEEE TPDS 2023: Analytical CPU convolution methodology achieving 1.1×–7.2× speedups vs oneDNN on ResNet-50/DenseNet-121/SqueezeNet layers (112 layers; two platforms).
- IEEE TPDS 2022: CPU 2D convolution methodology achieving 2.8×–40× speedups vs Intel IPP/OpenCV on key image-processing kernels across multiple image sizes and platforms.
Awards:
-
HiPEAC Technology Transfer Award (2022) - awarded by HiPEAC, Europe’s leading network for high-performance, embedded, and cyber-physical systems, in recognition of research translation and impact beyond academia. The award recognised the transfer of my research on design-space exploration and Tensor Train Decomposition to Think Silicon, contributing to the NEOX AI-SDK.
-
Best Paper Award, SAMOS XXII - “A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices�.
Supervised Research Degrees
-  “Improving the performance of HiRep Lattice Simulations software by exploiting the CPU/GPU hardware architecture details and algorithm characteristics�, Main Supervisor (DoS) for Dr. Shidur Rahman (2020-2024)
- Â "Optimising Flow Routing Using Network Performance Analysis", 2nd Supervisor for Dr Muna Al-Saadi (2020-2023)Â
Teaching
- Parallel Computing (COMP3001)
- Computer Systems (COMP1001)
- Computing Practice (COMP1004)
- Applicant Day Lead for six CS Programs (2023-present)Â
- Admissions Tutor for six CS Programs (2023-present)
- Academic Liaison Person for seven Computing Partner Colleges (2019-present)
- Coordinator of International Partnerships agreements for computing (2023-present)
- HPC Champion (Computing) and HPC Steering Committee member, (2022–present).
- EDI Committee Member (2022-23)
Contact Vasilios
B330, Portland Square, Drake Circus, Âé¶¹´«Ã½Ó³», PL4 8AA
+44 1752 586339
vasilios.kelefouras@plymouth.ac.uk